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HCTS283MS
Radiation Hardened 4 Bit Binary Full Adder with Fast Carry
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T16, LEAD FINISH C TOP VIEW
S1 1 B1 2 A1 3 S0 4 A0 5 B0 6 CIN GND 7 8 16 VCC 15 B2 14 A2 13 S2 12 A3 11 B3 10 S3 9 COUT
September 1995
Features
* 3 Micron Radiation Hardened CMOS SOS * Total Dose 200K RAD (Si) * SEP Effective LET No Upsets: >100 MEV-cm2/mg * Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ) * Dose Rate Survivability: >1 x 1012 RAD (Si)/s * Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse * Latch-Up Free Under Any Conditions * Military Temperature Range: -55oC to +125oC * Significant Power Reduction Compared to LSTTL ICs * DC Operating Voltage Range: 4.5V to 5.5V * LSTTL Input Compatibility - VIL = 0.8V Max - VIH = VCC/2V Min * Input Current Levels Ii 5A at VOL, VOH
16 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDIP2-T16, LEAD FINISH C TOP VIEW
S1 B1 A1 S0 A0 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC B2 A2 S2 A3 B3 S3 COUT
Description
The Intersil HCTS283MS is a Radiation Hardened 4 bit binary full adder with fast carry that adds two 4 bit binary numbers and generates a carry-out bit if the sum exceeds 15. This device can be used in positive or negative logic. When using positive logic the carry-in input must be tied low, if there is no carry-in. The HCTS283MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family . The HCTS283MS is supplied in a 16 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).
B0 CIN GND
Ordering Information
PART NUMBER HCTS283DMSR HCTS283KMSR HCTS283D/Sample HCTS283K/Sample HCTS283HMSR TEMPERATURE RANGE -55oC to +125oC -55oC to +125oC +25oC +25oC +25oC SCREENING LEVEL Intersil Class S Equivalent Intersil Class S Equivalent Sample Sample Die PACKAGE 16 Lead SBDIP 16 Lead Ceramic Flatpack 16 Lead SBDIP 16 Lead Ceramic Flatpack Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2002. All Rights Reserved 1
Spec Number
518641 FN3381.1
HCTS283MS Functional Diagram
7 CIN 5 A0 6 B0 3 A1 2 B1 14 A2 15 B2 12 A3 11 B3
8 GND 16 VCC
S0 4
S1 1
S2 13
S3 10
COUT 9
Spec Number 2
518641
Specifications HCTS283MS
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . . 10mA DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . . 25mA (All Voltage Reference to the VSS Terminal) Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Reliability Information
Thermal Resistance JA JC SBDIP Package. . . . . . . . . . . . . . . . . . . . 73oC/W 24oC/W Ceramic Flatpack Package . . . . . . . . . . . 114oC/W 29oC/W o Maximum Package Power Dissipation at +125 C Ambient SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.44W If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate: SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.7mW/oC Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.8mW/oC
CAUTION: As with all semiconductors, stress listed under "Absolute Maximum Ratings" may be applied to devices (one at a time) without resulting in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed under "Electrical Performance Characteristics" are the only conditions recommended for satisfactory device operation.
Operating Conditions
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . . 10ns/V Max Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . . . 2.0V to VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2, 3 Delta ICC DICC VCC = 5.5V, VIN = VCC or GND, 1 Input at 2.4V 1 2, 3 Output Current (Sink) IOL VCC = 4.5V, VIH = 4.5V, VOUT = 0.4V, VIL = 0V (Note 2) VCC = VIH = 4.5V, VOUT = VCC - 0.4V, VIL = 0V (Note 2) VCC = 4.5V, VIH = 2.25V, IOL = 50A, VIL = 0.8V VCC = 5.5V, VIH = 2.75V, IOL = 50A, VIL = 0.80V Output Voltage High VOH VCC = 4.5V, VIH = 2.25V, IOH = -50A, VIL = 0.8V VCC = 5.5V, VIH = 2.75V, IOH = -50A, VIL = 0.80V Input Leakage Current IIN VCC = 5.5V, VIN = VCC or GND 1 2, 3 1 2, 3 1, 2, 3 LIMITS TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC, +125oC, -55oC MIN 4.8 4.0 -4.8 -4.0 MAX 40 750 1.6 3.2 0.1 UNITS A A mA mA mA mA mA mA V
PARAMETER Quiescent Current
SYMBOL ICC
(NOTE 1) CONDITIONS VCC = 5.5V, VIN = VCC or GND
Output Current (Source)
IOH
Output Voltage Low
VOL
1, 2, 3
+25oC, +125oC, -55oC
-
0.1
V
1, 2, 3
+25oC, +125oC, -55oC
VCC -0.1 VCC -0.1 -
-
V
1, 2, 3
+25oC, +125oC, -55oC
-
V
1 2, 3
+25oC +125oC, -55oC +25oC, +125oC, -55oC
0.5 5.0 -
A A -
Noise Immunity Functional Test NOTES:
FN
VCC = 4.5V, VIH = 2.25V, VIL = 0.80V (Note 3)
7, 8A, 8B
1. All voltages referenced to device GND. 2. Force/Measure functions may be interchanged. 3. For functional tests VO 4.0V is recognized as a logic "1", and VO 0.5V is recognized as a logic "0".
Spec Number 3
518641
Specifications HCTS283MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 LIMITS TEMPERATURE +25 +125o
oC o
PARAMETER Propagation Delay CIN to S0
SYMBOL TPLH
(NOTES 1, 2) CONDITIONS VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V
MIN 2 2 2 2 2
MAX 23 27 26 30 27 31 30 35 31 37 34 40 38 47 40 48 53 67 54 63 50 63 60 73
UNITS ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
C, -55 C
o
TPHL
+25 C +125oC, -55oC C
o
Propagation Delay CIN to S1
TPLH
+25o
o
+125 C, -55 C +25oC +125o C, -55 C
o o
2 2 2 2 2 2
TPHL
Propagation Delay CIN to S2 CIN to COUT
TPLH
+25 C +125oC, -55oC C
o
TPHL
+25o
o
+125 C, -55 C +25oC +125oC, -55oC
2 2 2 2 2 2
Propagation Delay CIN to S3
TPLH
TPHL
+25 C +125oC, -55oC
o
Propagation Delay An, Bn to COUT
TPLH
+25oC +125 C, -55 C +25oC +125oC, -55oC
o o
2 2 2 2 2 2
TPHL
Propagation Delay An, Bn to Sn
TPLH
+25 C +125oC, -55oC
o
TPHL
+25oC +125 C, -55 C
o o
2
NOTES: 1. All voltages referenced to device GND. 2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Input Capacitance SYMBOL CIN CONDITIONS VCC = 5V, VIH = 5V, VIL = 0V, f = 1MHz VCC = 4.5V, VIH = 4.5V, VIL = 0V VCC = 5.5V, f = 1MHz NOTES 1 1 1 1 1 1 TEMPERATURE +25 C +125oC, -55oC
o
MIN -
MAX 10 10 15 22 250 315
UNITS pF pF ns ns pF pF
Output Transition Time Capacitance Power Dissipation NOTE:
TTHL, TTLH CPD
+25 C +125o C, -55 C
o
o
-
+25oC +125 C, -55 C
o o
-
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
Spec Number 4
518641
Specifications HCTS283MS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS 200K RAD LIMITS PARAMETER Quiescent Current Delta ICC SYMBOL ICC DICC (NOTES 1) CONDITIONS VCC = 5.5V, VIN = VCC or GND VCC = 5.5V, VIN = VCC or GND, 1 Input at 2.4V VCC = 4.5V, VIH = 4.5, VOUT = 0.4V, VIL = 0V VCC = 4.5V, VIH = 4.5, VOUT = VCC -0.4V VIL = 0V VCC = 4.5V, VIH = 2.25V, VIL = 0.80V, IOL = 50A VCC = 5.5V, VIH = 2.75V, VIL = 0.80V, IOL = 50A Output Voltage High VOH VCC = 4.5V, VIH = 2.25V, VIL = 0.80V, IOL = 50A VCC = 5.5V, VIH = 2.75V, VIL = 0.80V, IOL = 50A Input Leakage Current Noise Immunity Functional Test Propgation Delay CIN to S0 Propagation Delay CIN to S1 Propagation Delay CIN to S2, CIN to COUT Propagation Delay CIN to S3 Propagation Delay An, Bn to COUT Propagation Delay An, Bn to Sn NOTES: 1. All voltages referenced to device GND. 2. For functional tests VO 4.0V is recognized as a logic "1", and VO 0.5V is recognized as a logic "0". IIN FN VCC = 5.5V, VIN = VCC or GND VCC = 4.5V, VIH = 2.25V, VIL = 0.80V, (Note 2) VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V TEMPERATURE +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC MIN MAX 0.75 3.2 UNITS mA mA
Output Current (Sink)
IOL
4.0
-
mA
Output Current (Source) Output Voltage Low
IOH
-4.0
-
mA
VOL
-
0.1
V
-
0.1
V
VCC -0.1 VCC -0.1 -
-
V
5 -
V A -
TPLH TPHL TPLH TPHL TPLH TPHL TPLH TPHL TPLH TPHL TPLH TPHL
2 2 2 2 2 2 2 2 2 2 2 2
27 30 31 35 37 40 47 48 67 63 63 73
ns ns ns ns ns ns ns ns ns ns ns ns
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC) GROUP B SUBGROUP 5 5
PARAMETER ICC IOL/IOH
DELTA LIMIT 12A -15% of 0 Hour
Spec Number 5
518641
Specifications HCTS283MS
TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUPS Initial Test (Preburn-In) Interim Test I (Postburn-In) Interim Test II (Postburn-In) PDA Interim Test III (Postburn-In) PDA Final Test Group A (Note 1) Group B Subgroup B-5 Subgroup B-6 Group D NOTES: 1. Alternate Group A, in accordance with Method 5005 of MIL-STD-883, may be exercised. 2. Table 5 parameters only. METHOD 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 Sample/5005 Sample/5005 Sample/5005 Sample/5005 GROUP A SUBGROUPS 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9, Deltas 1, 7, 9 1, 7, 9, Deltas 2, 3, 8A, 8B, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas 1, 7, 9 1, 7, 9 Subgroups 1, 2, 3, 9, 10, 11, (Note 2) ICC, IOL/H READ AND RECORD ICC, IOL/H ICC, IOL/H ICC, IOL/H
TABLE 7. TOTAL DOSE IRRADIATION CONFORMANCE GROUPS Group E Subgroup 2 TEST METHOD 5005 PRE RAD 1, 7, 9 POST RAD Table 4 READ AND RECORD PRE RAD 1, 9 POST RAD Table 4 (Note 1)
NOTE: 1. Except FN Test which will be performed 100% Go/No-Go. TABLE 8. STATIC BURN-IN AND DYNAMIC OSCILLATOR OPEN GROUND 1/2 VCC = 3V 0.5V VCC = 6V 0.5V 50kHz 25kHz
STATIC BURN-IN I TEST CONNECTIONS (Note 1) 1, 4, 9, 10, 13 2, 3, 5, 6, 7, 8, 11, 12, 14, 15 16 -
STATIC BURN-IN II TEST CONNECTIONS (Note 1) 1, 4, 9, 10, 13 8 2, 3, 5, 6, 7, 11, 12, 14, 15, 16 -
DYNAMIC BURN-IN TEST CONNECTIONS (Note 2) NOTES: 1. Each pin except VCC and GND will have a resistor of 10k 5% for static burn-in 2. Each pin except VCC and GND will have a resistor of 1K 5% for dynamic burn-in TABLE 9. IRRADIATION TEST CONNECTIONS OPEN 1, 4, 9, 10, 13 GROUND 8 VCC = 5V 0.5V 2, 3, 5, 6, 7, 11, 12, 14, 15, 16 8 1, 4, 9, 10, 13 16 2, 6, 7, 11, 15 3, 5, 12, 14
NOTE: Each pin except VCC and GND will have a resistor of 47K 5% for irradiation testing. Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures.
Spec Number 6
518641
HCTS283MS Intersil Space Level Product Flow - `MS'
Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) GAMMA Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Nondestructive Bond Pull, Method 2023 Sample - Wire Bond Pull Monitor, Method 2011 Sample - Die Shear Monitor, Method 2019 or 2027 100% Internal Visual Inspection, Method 2010, Condition A 100% Temperature Cycle, Method 1010, Condition C, 10 Cycles 100% Constant Acceleration, Method 2001, Condition per Method 5004 100% PIND, Method 2020, Condition A 100% External Visual 100% Serialization 100% Initial Electrical Test (T0) 100% Static Burn-In 1, Condition A or B, 24 hrs. min., +125oC min., Method 1015
NOTES: 1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1. 2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the failures from subgroup 7. 3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004. 4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005. 5. Data Package Contents: * Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quantity). * Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage. * GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test equipment, etc. Radiation Read and Record data on file at Intersil. * X-Ray report and film. Includes penetrometer measurements. * Screening, Electrical, and Group A attributes (Screening attributes begin after package seal). * Lot Serial Number Sheet (Good units serial number and lot number). * Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test. * The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed by an authorized Quality Representative.
100% Interim Electrical Test 1 (T1) 100% Delta Calculation (T0-T1) 100% Static Burn-In 2, Condition A or B, 24 hrs. min., +125oC min., Method 1015 100% Interim Electrical Test 2 (T2) 100% Delta Calculation (T0-T2) 100% PDA 1, Method 5004 (Notes 1and 2) 100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or Equivalent, Method 1015 100% Interim Electrical Test 3 (T3) 100% Delta Calculation (T0-T3) 100% PDA 2, Method 5004 (Note 2) 100% Final Electrical Test 100% Fine/Gross Leak, Method 1014 100% Radiographic, Method 2012 (Note 3) 100% External Visual, Method 2009 Sample - Group A, Method 5005 (Note 4) 100% Data Package Generation (Note 5)
Spec Number 7
518641
HCTS283MS Propagation Delay Timing Diagram and Load Circuit
VIH VS VSS TPLH TPHL VOH VS VOL OUTPUT INPUT DUT CL TEST POINT RL CL = 50pF RL = 500
Transition Timing Diagram
AC VOLTAGE LEVELS
VOH TTLH 80% VOL 20% 80% 20% TTHL
PARAMETER VCC VIH VIL VS GND
HCS 4.50 3.00 0.0 1.30 0.0
UNITS V V V V V
OUTPUT
Spec Number 8
518641
HCTS283MS Die Characteristics
DIE DIMENSIONS: 78 x 86 mils 2.21mm x 2.19mm METALLIZATION: Type: SiAl Metal Thickness: 11kA 1kA GLASSIVATION: Type: SiO2 Thickness: 13kA 2.6kA WORST CASE CURRENT DENSITY: <2.0 x 10 5A/cm2 BOND PAD SIZE: 100m x 100m 4 x 4 mils
Metallization Mask Layout
S1 (1)
HCTS283MS
VCC (16) B2 (15) A2 (14)
B1 (2)
(13) S2 A1 (3)
S0 (4)
(12) A3
(11) B3 A0 (5)
B0 (6)
(7) CIN
(8) GND
(9) COUT
(10) S3
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com Spec Number 9
518641


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